TY - GEN
T1 - Via Transition Optimization Using a Domain Decomposition Approach
AU - Carmona-Cruz, Allan
AU - Scharff, Katharina
AU - Cedeño-Chaves, Jonathan
AU - Brüns, Heinz Dietrich
AU - Rimolo-Donadio, Renato
AU - Schuster, Christian
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/6
Y1 - 2019/6
N2 - A method to minimize the return loss for via interconnects on printed circuit boards (PCB), based on the domain decomposition of traces, via barrels, and trace-to-via transitions is presented. This decomposition allows to optimize different via lengths, by separating the via barrel as an independent domain. The method is demonstrated by full-wave simulations. It starts by optimizing the via impedance, matching the traces by an appropriate size of the via environment followed by a subsequent compensation of trace-to-via transition discontinuities. Equivalent circuits of each domain are used to corroborate the performance improvement. Three pad geometries are proposed to compensate the discontinuities of a trace-to-via transition. For a long via on a PCB with eleven metal layers, using four ground vias, it was possible to achieve a wide-band low-reflection response below -30 dB from DC up to 32 GHz for microstrip traces and -37 dB from DC up to 20 GHz for stripline traces.
AB - A method to minimize the return loss for via interconnects on printed circuit boards (PCB), based on the domain decomposition of traces, via barrels, and trace-to-via transitions is presented. This decomposition allows to optimize different via lengths, by separating the via barrel as an independent domain. The method is demonstrated by full-wave simulations. It starts by optimizing the via impedance, matching the traces by an appropriate size of the via environment followed by a subsequent compensation of trace-to-via transition discontinuities. Equivalent circuits of each domain are used to corroborate the performance improvement. Three pad geometries are proposed to compensate the discontinuities of a trace-to-via transition. For a long via on a PCB with eleven metal layers, using four ground vias, it was possible to achieve a wide-band low-reflection response below -30 dB from DC up to 32 GHz for microstrip traces and -37 dB from DC up to 20 GHz for stripline traces.
KW - Compensation
KW - domain decomposition
KW - printed circuit board
KW - signal integrity
KW - trace-to-via transition
KW - vertical interconnect
KW - via impedance
UR - http://www.scopus.com/inward/record.url?scp=85070886648&partnerID=8YFLogxK
U2 - 10.1109/SaPIW.2019.8781679
DO - 10.1109/SaPIW.2019.8781679
M3 - Contribución a la conferencia
AN - SCOPUS:85070886648
T3 - 2019 IEEE 23rd Workshop on Signal and Power Integrity, SPI 2019 - Proceedings
BT - 2019 IEEE 23rd Workshop on Signal and Power Integrity, SPI 2019 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 23rd IEEE Workshop on Signal and Power Integrity, SPI 2019
Y2 - 18 June 2019 through 21 June 2019
ER -