The viability of 25 Gb/s on-board signalling

Mark B. Ritter, Petar Pepeljugoski, Xiaoxiong Gu, Young Kwark, Dong Kam, Renato Rimolo-Donadio, Boping Wu, Christian Baks, Richard John, Lei Shan, Christian Schuster

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

4 Citas (Scopus)

Resumen

What package improvements are required for dense, high aggregate bandwidth buses running at data rates beyond 10 Gb/s per pin, and when might optical interconnects on the board be required? We present a study of distance and speed limits for electrical on-board module-to-module links with an eye to answering these questions. Detailed electrical link models have been validated with active, high-speed differential bus measurements utilizing a 16-channel link chip with programmable equalization and a per-channel data rate of up to 11 Gb/s. Electrical signalling limits were then determined by extrapolating our models to higher speeds, and these limits were compared to the results of work on on-board optical interconnects.

Idioma originalInglés
Título de la publicación alojada2008 Proceedings 58th Electronic Components and Technology Conference, ECTC
Páginas1121-1127
Número de páginas7
DOI
EstadoPublicada - 2008
Publicado de forma externa
Evento2008 58th Electronic Components and Technology Conference, ECTC - Lake Buena Vista, FL, Estados Unidos
Duración: 27 may 200830 may 2008

Serie de la publicación

NombreProceedings - Electronic Components and Technology Conference
ISSN (versión impresa)0569-5503

Conferencia

Conferencia2008 58th Electronic Components and Technology Conference, ECTC
País/TerritorioEstados Unidos
CiudadLake Buena Vista, FL
Período27/05/0830/05/08

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