Review of CMOS circuit architectures for Electrical Impedance Spectroscopy

Ronny Garcia-Ramirez, Oscar Villalta-Gutierrez, Renato Rimolo-Donadio

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

4 Citas (Scopus)

Resumen

In this paper, different architectures at integrated circuit level for the implementation of Electrical Impedance Spectroscopy(EIS) systems are compared and discused. The main functional blocks required by each architecture and their underlying concepts are explained. Additionally, the performance and design specifications for different implementations are contrasted.

Idioma originalInglés
Título de la publicación alojada2016 IEEE 36th Central American and Panama Convention, CONCAPAN 2016
EditorialInstitute of Electrical and Electronics Engineers Inc.
ISBN (versión digital)9781467395786
DOI
EstadoPublicada - 2 jul 2016
Evento36th IEEE Central American and Panama Convention, CONCAPAN 2016 - San Jose, Costa Rica
Duración: 9 nov 201611 nov 2016

Serie de la publicación

Nombre2016 IEEE 36th Central American and Panama Convention, CONCAPAN 2016

Conferencia

Conferencia36th IEEE Central American and Panama Convention, CONCAPAN 2016
País/TerritorioCosta Rica
CiudadSan Jose
Período9/11/1611/11/16

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