TY - GEN
T1 - PlasticNet
T2 - 3rd IEEE Conference on Ph.D. Research in Microelectronics and Electronics in Latin America, PRIME-LA 2020
AU - Salazar-Garcia, Carlos
AU - Gonzalez-Gomez, Jeferson
AU - Alfaro-Badilla, Kaleb
AU - Garcia-Ramirez, Ronny
AU - Rimolo-Donadio, Renato
AU - Strydis, Christos
AU - Chacon-Rodriguez, Alfonso
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/2
Y1 - 2020/2
N2 - This paper presents preliminary results of Plastic-Net, a custom FPGA interconnect architecture designed for high-processing applications that communicate extensively among multiple FPGAs. PlasticNet allows the interconnection of processing nodes (PNs) through a flexible, reliable and efficient custom protocol, that can be easily integrated in High-Level Synthesis (HLS) modern design environments. The system is evaluated on a ZedBoard Zynq®-7000 ARM/FPGA SoC Development Board, including criteria such as overhead, area, worst-case packet delivery latency and bandwidth. The best evaluated case achieved a half-occupancy latency of 16.9μs. The results show the potential of PlasticNet as an efficient solution for low latency multi-FPGA interconnection.
AB - This paper presents preliminary results of Plastic-Net, a custom FPGA interconnect architecture designed for high-processing applications that communicate extensively among multiple FPGAs. PlasticNet allows the interconnection of processing nodes (PNs) through a flexible, reliable and efficient custom protocol, that can be easily integrated in High-Level Synthesis (HLS) modern design environments. The system is evaluated on a ZedBoard Zynq®-7000 ARM/FPGA SoC Development Board, including criteria such as overhead, area, worst-case packet delivery latency and bandwidth. The best evaluated case achieved a half-occupancy latency of 16.9μs. The results show the potential of PlasticNet as an efficient solution for low latency multi-FPGA interconnection.
KW - Customized network protocol
KW - HLS
KW - inter-FPGA communication
KW - interconnect architecture
KW - multi-FPGA
UR - http://www.scopus.com/inward/record.url?scp=85084039882&partnerID=8YFLogxK
U2 - 10.1109/PRIME-LA47693.2020.9062749
DO - 10.1109/PRIME-LA47693.2020.9062749
M3 - Contribución a la conferencia
AN - SCOPUS:85084039882
T3 - PRIME-LA 2020 - 3rd IEEE Conference on Ph.D. Research in Microelectronics and Electronics in Latin America, Proceedings
BT - PRIME-LA 2020 - 3rd IEEE Conference on Ph.D. Research in Microelectronics and Electronics in Latin America, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 25 February 2020 through 28 February 2020
ER -