Integration of Double Barrier Memristor Die with Neuron ASIC for Neuromorphic Hardware Learning

Rajeev Ranjan, Mirko Hansen, Pablo Mendoza Ponce, Lait Abu Saleh, Dietmar Schroeder, Martin Ziegler, Hermann Kohlstedt, Wolfgang H. Krautschneider

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

Resumen

This paper details the design of an integrate fire (I F) neuron ASIC and its integration with a double barrier memristor device. The memristor has a non-volatile analog memory characteristic which changes with time and voltage. The neuron ASIC is designed to interact with the memristor by integrating its current and firing when a certain threshold is reached. The resulting spikes increase the memristor's conductance and consequently the firing rate of neuron increases. Together, the ASIC and the memristor mimics neuromorphic learning on hardware. The ASIC has been fabricated in AMS 350nm process.

Idioma originalInglés
Título de la publicación alojada2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings
EditorialInstitute of Electrical and Electronics Engineers Inc.
ISBN (versión digital)9781538648810
DOI
EstadoPublicada - 26 abr 2018
Publicado de forma externa
Evento2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Florence, Italia
Duración: 27 may 201830 may 2018

Serie de la publicación

NombreProceedings - IEEE International Symposium on Circuits and Systems
Volumen2018-May
ISSN (versión impresa)0271-4310

Conferencia

Conferencia2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018
País/TerritorioItalia
CiudadFlorence
Período27/05/1830/05/18

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