TY - GEN
T1 - Evaluation of concatenation techniques for state-space interconnect macromodels
AU - Carrera-Retana, Luis Ernesto
AU - Rimolo-Donadio, Renato
AU - Schuster, Christian
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/7/2
Y1 - 2017/7/2
N2 - In this work, we show that concatenating inter-connect models represented in state-space (descriptor) form, obtained from either the vector fitting algorithm or the Loewner matrix pencil method, can provide results as accurate as usual concatenation using sampled frequency domain data. A PCB-based interconnect is used as an example.
AB - In this work, we show that concatenating inter-connect models represented in state-space (descriptor) form, obtained from either the vector fitting algorithm or the Loewner matrix pencil method, can provide results as accurate as usual concatenation using sampled frequency domain data. A PCB-based interconnect is used as an example.
KW - Macromodeling
KW - on-chip inter-connect simulation
KW - signal integrity
UR - http://www.scopus.com/inward/record.url?scp=85049759065&partnerID=8YFLogxK
U2 - 10.1109/EPEPS.2017.8329728
DO - 10.1109/EPEPS.2017.8329728
M3 - Contribución a la conferencia
AN - SCOPUS:85049759065
T3 - 2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2017
SP - 1
EP - 3
BT - 2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 26th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2017
Y2 - 15 October 2017 through 18 October 2017
ER -