Electrical interconnect design for testing of high-speed IC transceivers

R. Rimolo-Donadio, C. Baks, B. G. Lee, J. H. Song, X. Gu, Y. H. Kwark, D. M. Kuchta, A. V. Rylyakov, C. L. Schow

Producción científica: Capítulo del libro/informe/acta de congresoContribución a la conferenciarevisión exhaustiva

2 Citas (Scopus)

Resumen

This paper discusses the requirements and challenges associated with the design of electrical interconnects to support the test and evaluation of high-speed transceivers working up to 40 Gb/s. It will be shown that relatively low cost technologies such as FR-4 boards, push-on connectors, and wire bonding can effectively achieve this goal. A specific platform and its application for testing of a 40-Gb/s VCSEL-based optoelectronic link are presented.

Idioma originalInglés
Título de la publicación alojada2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012
Páginas55-58
Número de páginas4
DOI
EstadoPublicada - 2012
Publicado de forma externa
Evento2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012 - Tempe, AZ, Estados Unidos
Duración: 21 oct 201224 oct 2012

Serie de la publicación

Nombre2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012

Conferencia

Conferencia2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012
País/TerritorioEstados Unidos
CiudadTempe, AZ
Período21/10/1224/10/12

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