Efficient Prediction of Equalization Effort and Channel Performance for PCB-Based Data Links

Torsten Reuschel, Jan B. Preibisch, Katharina Scharff, Renato Rimolo-Donadio, Xiaomin Duan, Young H. Kwark, Christian Schuster

Producción científica: Contribución a una revistaArtículorevisión exhaustiva

12 Citas (Scopus)

Resumen

High-speed data links that utilize multilayer printed circuit boards suffer from loss, dispersion, and intersymbol interference. Often, equalization and error correction are required to make these channels functional at gigabit data rates and demand costly analyses. The characterization of loss-dominated links can be generalized and simplified by means of a normalized link length as presented herein. Based on a correlation of this normalized length and observed eye opening, a novel assessment of wired digital links for frequencies up to 50GHz and data rates up to 30 Gb/s is proposed. It allows for an efficient prediction of the amount and type of required equalization for a given link as well as determining maximum tolerable loss for a given equalizer configuration. The proposed method and its applicability are demonstrated by means of practical examples.

Idioma originalInglés
Número de artículo8053454
Páginas (desde-hasta)1842-1851
Número de páginas10
PublicaciónIEEE Transactions on Components, Packaging and Manufacturing Technology
Volumen7
N.º11
DOI
EstadoPublicada - nov 2017

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