Design of a MCML gate library applying multiobjective optimization

Roberto Pereira-Arroyo; Pablo Alvarado-Moya; Wolfgang H. Krautschneider

doi:10.1109/ISVLSI.2007.38

Design of a MCML gate library applying multiobjective optimization

Roberto Pereira-Arroyo, Pablo Alvarado-Moya, Wolfgang H. Krautschneider

Escuela de Ingeniería Electrónica

Producción científica: Capítulo del libro/informe/acta de congreso › Contribución a la conferencia › revisión exhaustiva

3 Citas (Scopus)

Resumen

In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of each gate that is part of our MCML basic library. A genetic algorithm (GA) is employed to automatically detect this front in a process that efficiently finds optimal parameterizations and their corresponding values in an aggregate fitness space. Measures of the power consumption, propagation delay and output voltage swing are used as fitness functions, since the problem is treated as a multiobjective optimization task. Finally, the results of postlayout simulations, using the AMS 0.35 μm technology are presented.

Idioma original	Inglés
Título de la publicación alojada	Proceedings - IEEE Computer Society Annual Symposium on VLSI
Subtítulo de la publicación alojada	Emerging VLSI Technologies and Architectures
Páginas	81-85
Número de páginas	5
DOI	https://doi.org/10.1109/ISVLSI.2007.38
Estado	Publicada - 2007
Evento	IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07 - Porto Alegre, Brasil Duración: 9 mar 2007 → 11 mar 2007

Serie de la publicación

Nombre	Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures

Conferencia

Conferencia	IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07
País/Territorio	Brasil
Ciudad	Porto Alegre
Período	9/03/07 → 11/03/07

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10.1109/ISVLSI.2007.38

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Pereira-Arroyo, R., Alvarado-Moya, P., & Krautschneider, W. H. (2007). Design of a MCML gate library applying multiobjective optimization. En Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (pp. 81-85). Artículo 4208898 (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures). https://doi.org/10.1109/ISVLSI.2007.38

Pereira-Arroyo, Roberto ; Alvarado-Moya, Pablo ; Krautschneider, Wolfgang H. / Design of a MCML gate library applying multiobjective optimization. Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures. 2007. pp. 81-85 (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures).

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Pereira-Arroyo, R, Alvarado-Moya, P & Krautschneider, WH 2007, Design of a MCML gate library applying multiobjective optimization. En Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures., 4208898, Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, pp. 81-85, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures, ISVLSI'07, Porto Alegre, Brasil, 9/03/07. https://doi.org/10.1109/ISVLSI.2007.38

Design of a MCML gate library applying multiobjective optimization. / Pereira-Arroyo, Roberto; Alvarado-Moya, Pablo; Krautschneider, Wolfgang H.
Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures. 2007. p. 81-85 4208898 (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures).

Producción científica: Capítulo del libro/informe/acta de congreso › Contribución a la conferencia › revisión exhaustiva

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Pereira-Arroyo R, Alvarado-Moya P, Krautschneider WH. Design of a MCML gate library applying multiobjective optimization. En Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures. 2007. p. 81-85. 4208898. (Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures). doi: 10.1109/ISVLSI.2007.38

Design of a MCML gate library applying multiobjective optimization

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