TY - GEN
T1 - A 1.9 nW Timer and Clock Generation Unit for Low Data-Rate Implantable Medical Devices
AU - Ponce, Pablo Mendoza
AU - Sayed, Gayas
AU - Saleh, Lait Abu
AU - Krautschneider, Wolfgang H.
AU - Kuhl, Matthias
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/2
Y1 - 2020/2
N2 - This work presents a thyristor-based low power timer for wake up control of implantable monitoring devices, as well as a clock generation unit based on said approach. By using CMOS thyristors as delay elements in a ring oscillator, major drawbacks of conventional ring oscillators, such as a high stage count of inverters and capacitors with large currents flowing t o g round d uring s witching, c an b e o vercome. T his is particularly relevant for low frequency generation where these issues become even more critical in terms of power and area. Thyristors generate larger delays per stage while presenting a faster transition when switching between states, when compared to a typical CMOS inverter, an thus demand a smaller dynamic power. Timer, clock gating control and clock generation units were combined, implemented, and fabricated in 350 nm CMOS technology. The timer is able to wake up the clocking system (and hence a digital control unit) every 32.45 s with a power budget of less than 2 nW, while the clock generation unit produces a signal of 8.2 kHz.
AB - This work presents a thyristor-based low power timer for wake up control of implantable monitoring devices, as well as a clock generation unit based on said approach. By using CMOS thyristors as delay elements in a ring oscillator, major drawbacks of conventional ring oscillators, such as a high stage count of inverters and capacitors with large currents flowing t o g round d uring s witching, c an b e o vercome. T his is particularly relevant for low frequency generation where these issues become even more critical in terms of power and area. Thyristors generate larger delays per stage while presenting a faster transition when switching between states, when compared to a typical CMOS inverter, an thus demand a smaller dynamic power. Timer, clock gating control and clock generation units were combined, implemented, and fabricated in 350 nm CMOS technology. The timer is able to wake up the clocking system (and hence a digital control unit) every 32.45 s with a power budget of less than 2 nW, while the clock generation unit produces a signal of 8.2 kHz.
KW - Biomedical electronics
KW - CMOS Thyristor
KW - Leakage currents
KW - Ring oscillators
KW - Timing
UR - http://www.scopus.com/inward/record.url?scp=85084326377&partnerID=8YFLogxK
U2 - 10.1109/LASCAS45839.2020.9068949
DO - 10.1109/LASCAS45839.2020.9068949
M3 - Contribución a la conferencia
AN - SCOPUS:85084326377
T3 - 2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020
BT - 2020 IEEE 11th Latin American Symposium on Circuits and Systems, LASCAS 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 11th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2020
Y2 - 25 February 2020 through 28 February 2020
ER -