TY - GEN
T1 - A 0.13 CMOS integrated circuit for electrical impedance spectroscopy from 1 kHz to 10 GHz
AU - Garcia-Ramirez, Ronny
AU - Chacon-Rodriguez, Alfonso
AU - Rimolo-Donadio, Renato
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/12/18
Y1 - 2017/12/18
N2 - The design of an electrical impedance spectroscopy acquisition and processing system using a 0.13 μm CMOS technology with a 1kHz to 10 GHz functional frequency range is presented. The system is based on a quadrature modulator in a lock-in architecture. The design of each one of the modules of the system is explained, and post-layout simulations are used to validate the main features of the design such as frequency response, gain, noise, linearity, and error characterization.
AB - The design of an electrical impedance spectroscopy acquisition and processing system using a 0.13 μm CMOS technology with a 1kHz to 10 GHz functional frequency range is presented. The system is based on a quadrature modulator in a lock-in architecture. The design of each one of the modules of the system is explained, and post-layout simulations are used to validate the main features of the design such as frequency response, gain, noise, linearity, and error characterization.
KW - Analog VLSI
KW - Broadband Impedance Spectroscopy
KW - Electric Impedance Spectroscopy
KW - Impedance
KW - Lock-in architecture
UR - http://www.scopus.com/inward/record.url?scp=85044328752&partnerID=8YFLogxK
U2 - 10.1109/SOCC.2017.8226022
DO - 10.1109/SOCC.2017.8226022
M3 - Contribución a la conferencia
AN - SCOPUS:85044328752
T3 - International System on Chip Conference
SP - 126
EP - 131
BT - Proceedings - 30th IEEE International System on Chip Conference, SOCC 2017
A2 - Becker, Jurgen
A2 - Sridhar, Ramalingam
A2 - Li, Hai
A2 - Schlichtmann, Ulf
A2 - Alioto, Massimo
PB - IEEE Computer Society
T2 - 30th IEEE International System on Chip Conference, SOCC 2017
Y2 - 5 September 2017 through 8 September 2017
ER -