Electrical interconnect design for testing of high-speed IC transceivers

R. Rimolo-Donadio, C. Baks, B. G. Lee, J. H. Song, X. Gu, Y. H. Kwark, D. M. Kuchta, A. V. Rylyakov, C. L. Schow

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

This paper discusses the requirements and challenges associated with the design of electrical interconnects to support the test and evaluation of high-speed transceivers working up to 40 Gb/s. It will be shown that relatively low cost technologies such as FR-4 boards, push-on connectors, and wire bonding can effectively achieve this goal. A specific platform and its application for testing of a 40-Gb/s VCSEL-based optoelectronic link are presented.

Original languageEnglish
Title of host publication2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012
Pages55-58
Number of pages4
DOIs
StatePublished - 2012
Externally publishedYes
Event2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012 - Tempe, AZ, United States
Duration: 21 Oct 201224 Oct 2012

Publication series

Name2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012

Conference

Conference2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2012
Country/TerritoryUnited States
CityTempe, AZ
Period21/10/1224/10/12

Keywords

  • interconnects
  • power integrity
  • printed circuit board
  • short-reach link
  • signal integrity
  • wire bond

Fingerprint

Dive into the research topics of 'Electrical interconnect design for testing of high-speed IC transceivers'. Together they form a unique fingerprint.

Cite this